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IIJEE:Volume 5, Issue 2, February 2017

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Title:
PROPOSE AND REALIZATION OF AN ASIPBASED CRYPTO PROCESSOR FOR IDEA AND SAFER K-64
Author Name:
Miss. Puja Pancholi
Abstract:
ABSTRACT A New crypto processor is planned during this paper for International encryption algorithmic program (IDEA), and Secure And quick secret writing Routine with 64-bit Key (SAFER K- 64). The utilised platform relies on Application Specific Instruction set Processors (ASIP). Instruction set consists of each general purpose and specific directions for cryptography. each secret writing and coding functions area unit enforced for plan. additionally, either six or eight rounds may be selected once SAFER K-64 is used. coming up with method for all of the most important parts among the processor core is given thoroughly. the entire instruction set is written in Register remodel Language (RTL). Then, the whole processor is simulated, tested and enforced victimisation synthesizable structural VHDL code.
Cite this article:
Miss. Puja Pancholi , " PROPOSE AND REALIZATION OF AN ASIPBASED CRYPTO PROCESSOR FOR IDEA AND SAFER K-64" , IPASJ INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING (IIJEE) , Volume 5, Issue 2, February 2017 , pp. 044-046 , ISSN 2321-600X.
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